About Me
Hi! I’m Ziyang Ren, an engineer and researcher passionate about bridging hardware design, architecture research, and statistical modeling.
- 🎓 M.Eng. in Electrical & Computer Engineering, Cornell University
- 💼 Currently based in Singapore, working in ASIC / SoC design at Canaan Creative
- 🔬 Focus areas: Computer Architecture, High-Performance Computing (HPC), Memory Systems, and Bayesian Statistics
- 📫 Contact: zyren1407@gmail.com
- 🌐 Website: thomasyyyy.com
🧠 Research & Technical Interests
I’m deeply interested in hardware–software co-design for performance-critical systems.
My work focuses on:
- 🧩 Designing custom memory-controller subsystems (burst splitting, arbitration, address prediction) in RTL.
- ⚙️ Exploring parallel architectures and HPC algorithms (SPH simulation, matrix multiply, CNN acceleration).
- 📈 Applying Bayesian modeling and probabilistic inference for performance estimation and system reliability.
- 🧰 Experienced with Synopsys DC/VCS/SpyGlass, DesignWare IPs, Verdi, PyMC, and cuDNN.
🎓 Education
Cornell University — M.Eng. in Electrical and Computer Engineering
Aug 2023 – Dec 2024 · Ithaca, NY, USA
💼 Experience
🧩 Projects & Coursework Highlights
- GPU-Accelerated SPH Fluid Simulation (CUDA + OpenGL)
- Matrix-Matrix Multiply Optimization (Blocked, Tiled, and Parallelized)
- Bayesian Change-Point Model for email spam detection (PyMC 5.26)
- Hierarchical ANOVA for ecological data using MCMC sampling
- CNN for CIFAR-10 with cuDNN and PyTorch, achieving > 90% accuracy
🧠 Personal Interests
Outside engineering, I’m enthusiastic about:
- 🏋️♂️ Fitness and swimming
- 🎾 Tennis and outdoor sports
- 🎮 Gaming, tech, and electronics
- ✈️ Traveling around the world
“The best way to predict the future is to invent it.”
— Alan Kay

